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Mühendislik Mimarlık Fakültesi - Bolumderslericerik Muhendislik
Course unit title Level of course unit Course unit code Type of course unit L+R C ECTS
Computer Organization and Design BIM-202 Compulsory 4 3 6

Description of course unit

Prerequisites and course requisities BM 201 (Digital Design)
Language of instruction Turkish
Coordinator
Lecturer(s)
Teaching assitant(s)
Mode of delivery Face to Face
Course objective This course aims to teach the student enrolling this class: the principles of designing an instruction set architecture, the MIPS Assembly language and instructions, the arithmetic for computers, the design of the datapath and the controller of a single cycle MIPS processor, the design of the datapath and the controller of a multicycle MIPS processor, the design of the datapath and the controller of a pipelined MIPS processor, the memory hierarchy and the cache design.
Course description This course is about how to organize a computer and how to design its instruction set architecture.

Course contents

1- Computer Abstractions and Technology.
2- Instructions: Language of the Computer.
3- Instructions: Language of the Computer.
4- Instructions: Language of the Computer.
5- Instructions: Language of the Computer.
6- Arithmetic for Computers.
7- The Processor: Datapath and Control (Single Cycle Implementation).
8- The Processor: Datapath and Control (Multicycle Implementation).
9- The Processor: Datapath and Control (Multicycle Implementation).
10- The Processor: Datapath and Control (Pipelining).
11- The Processor: Datapath and Control (Pipelining).
12- Large and Fast: Exploiting Memory Hierarchy.
13- Large and Fast: Exploiting Memory Hierarchy.
14- Storage and other I/O Topics.
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Learning outcomes of the course unit

1- The student will learn the principles of designing an instruction set architecture.
2- The student will learn the MIPS assembly language and instructions.
3- The student will write computer programs with MIPS assembly language.
4- The student will learn another assembly language easily.
5- The student will learn the floating point arithmetic.
6- The student will design the datapath and the controller of a single cycle, multi cycle and pipelined MIPS processor.
7- The student will learn the memory hierarchy.
8- The student will learn the cache design with every aspect.
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